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TB62D901FNG 2012-03-12 1 toshiba bicd integrated circuit silicon monolithic TB62D901FNG ac/dc step-down conversion type led lighting driver 1. general the TB62D901FNG is a constant current driver ic ideal for use in the step-down ac/dc conversion type led lighting applications. the TB62D901FNG features architecture with automatic off time adjustment control that can be used to achieve minimum led current variations by the effect of fluctuated input voltage or change of led forward voltage. the device allows linear dimming or pwm dimming. it has extensive detection functions that are thermal shutdown, over-current detection, over-voltage detection, under-voltage lockout, and current sensing input terminal (isen1) open detection. 2. application led lighting 3. features ? operating supply voltage : 12v to 30v ? dimming function : linear dimming (by adjustment of led peak current) pwm dimming ? switching frequency : adjustable of up to 500khz (max) ? operation mode : current continuous conduction mode ( automatic off time control mode, fixed off time mode ) critical conduction mode ? efficiency : 90% or more with recommended components ? detection function : thermal shutdown (tsd) : over-current detection (ocp) : over-voltage detection (ovp) : under-voltage lockout (uvlo) : isen terminal open detection (iop) ? ic standby function : en signal allows standby mode with 0.8ma (max) consumption current ? operating temperature : t opr = ? 40 c to 105 c ? package : ssop16-p-225-0.65b TB62D901FNG ssop16-p-225-0.65b weight: 0.07 g (typ.)
TB62D901FNG 2012-03-12 2 4. block diagram vcc gate driver r s q comp osc tsd logic isen open protection uvlo vref ref off time control ldo pwmd rc ld comp gnd vsen gate isen1 vreg ms pgnd en isen2 pgnd isen2
TB62D901FNG 2012-03-12 3 5. pin assignment (top view) 1 16 2 3 4 5 6 7 8 15 14 13 12 11 10 9 vcc pgnd isen1 vsen nc ms pwmd ld gnd vreg rc en gate isen2 nc nc 6. pin description pin no pin name i/o function 1 vcc p power supply input. 2 vreg o output of the internal regulator. 3 ms i input to set switching operation mode. gnd short-circuit: continuous mode vreg terminal short-circuit: critical mode 4 pwmd i pwm signal input for the pwm dimming. ?h" level voltage input: led lighting current on "l" level voltage input: led lighting current off 5 ld i analogue input voltage to set the peak value of the led current. 6 rc i analog input to set the ripple range of the led current. 7 en i ic enable signal input. ?h" level voltage input: operation mode "l" level voltage input: standby mode. in standby mode, circuits other than the regulator circuit, the standard voltage circuit, and the uvlo circuit stop operation. 8 gnd p ground. 9 nc - no connect. connect to gnd 10 nc - no connect. connect to gnd 11 nc - no connect. connect to gnd 12 vsen i input for feedback voltage. this input voltage of vsen determines the off time of the control output gate for external power mosfet of the step-down driver. 13 isen2 i detection terminal for led current. connect to the gnd side of the current sensing resistor between isen1 and gnd. 14 isen1 i detection terminal for led current. the peak value of led current is determined by the resistance connected between isen1 terminal and gnd. 15 gate o output for controlling the gate of the power mosfet 16 pgnd p power ground for gate diver. *i/o symbol i: input, o: output, p: power supply
TB62D901FNG 2012-03-12 4 7. i/o equivalent circuits pin no pin name equivalent circuit pin no pin name equivalent circuit 1 vcc 8 gnd 2 vreg 13 pgnd 3 ms 16 isen2 vreg pgnd gnd isen2 vcc 5 ld 12 vsen 6 rc 14 isen1 4 pwmd 15 gate pgnd vcc pgnd 7 en
TB62D901FNG 2012-03-12 5 8. absolute maximum ratings (t a = 25c) characteristics symbol rating note1 unit supply voltage v cc ? 0.3 to 40 v input pin voltage (pwmd, ld, rc, en, and ms) v in ? 0.3 to 6.0 v vreg pin voltage v reg ? 0.3 to 6.0 v feedback pin voltage (isen1 and vsen) v fb ? 0.3 to 6.0 v gate pin voltage v gate ? 0.3 to v cc v operating temperature t opr ?40 to 105 c storage temperature t stg ?55 to 150 c thermal resistance r th(j-a) 87.3* note 2 c/ w power dissipation p d 1.43* note2,3 w note1: voltage is pgnd/gnd/isen2 referenced. note2: pcb condition is 76.2114.3 1.6mm (jedec 4 layer substrate) note3: when ambient temperature is 25c or more. every time ambient temperature exceeded 1c, please decrease 1/rth(j-a). 9. operating condition (unless otherwise noted, t a = -40 to 105 c) characteristics symbol test conditions min typ. max unit operating supply voltage v cc 12 D 30 v switching frequency f sw D D 500 khz v ld1 when led peak current adjustment function is used 0.2 D 3.8 ld pin input voltage v ld2 when led peak current adjustment function is not used 4.5 D v reg v v rc1 when led peak current adjustment function is used 1 D 4.0 rc pin input voltage v rc2 when led peak current adjustment function is not used 0 D 0.5 v v vsen1 when using it in automatic off time control mode 0.5 D 3 vsen pin input voltage v vsen2 when using it in fixed off time mode 4.5 D v reg v gate pin output voltage which is the same level as v cc . please set up v cc in consideration of the absolute maximum ratings of the external power mosfet
TB62D901FNG 2012-03-12 6 10. electrical characteristics (unless otherwise noted, t a = 25 c, v cc =12v) characteristics symbol test conditions min typ. max unit consumption current operating consumption current i cc(on) en=h, pwmd=h, ms=l v vsen = v reg , v ld =v reg , v rc =0v v isen1 =0v D 2.0 2.5 standby consumption current i cc(off) en=l D 0.5 0.8 ma regulator part vreg output voltage v reg i reg =0ma 4.9 5 5.1 v vreg maximum output current i reg D D 2 ma uvlo part uvlo release voltage v uvlo(up) v cc rising 10.5 11 11.5 v uvlo operation voltage v uvlo(down) v cc falling 8.0 8.5 9.0 v gate driver part gate pin source resistance r gateh i gate =-100ma D 5 10 ? gate pin sink resistance r gatel i gate =100ma D 2.5 5 ? gate pin rising time t rgate c l =1nf D 15 30 ns gate pin falling time t fgate c l =1nf D 15 30 ns mosfet off time t off en=h, pwmd=h, ms=l v vsen = v reg , v ld =v reg , v rc =0v 3.87 4 4.13 s detection circuit part ovp operation voltage v ovp vcc pin 32 35 38 v v ocp1 isen pin, v ld =v reg 1.4 1.6 1.8 v ocp2 isen pin, v ld =0.2v v ld +0.1 v ld +0.4 v ld +0.7 ocp operation voltage v ocp3 isen pin, v ld =3.8v v ld -0.0 v ld +0.2 v ld +0.4 v tsd operation temperature t tsd temperature rising 130 140 150 c tsd hysteresis temperature t tsd(hys) temperature falling 10 20 30 c input pin part input pin high level input voltage (pwmd, en, and ms) v inh 1.5 D v reg v input pin low level input voltage (pwmd, en, and ms) v inl 0 D 0.4 v i inh measurement pin is pwmd, en, ld, and rc. v in =v reg , v isen1 =0v D D 1 a input pin input current i inl measurement pin is pwmd, en, ms, ld, and rc. v in =0v, v isen1 =0v -1 D D a ms pin pull down resistance r up 240 300 360 k? detection pin part v peak1 v ld =v reg 0.95 1.0 1.05 isen pin peak voltage v peak2 v ld =0.2v to 3.8v v ld /1.5 -0.1 v ld /1.5 v ld /1.5 +0.1 v detection blanking time t blk 250 400 550 ns
TB62D901FNG 2012-03-12 7 11. description of operation 11.1 standard connection diagram fuse vcc gate isen1 vsen gnd pwmd rc TB62D901FNG pgnd vreg ms en ld isen2 pwm input
TB62D901FNG 2012-03-12 8 11.2 operation modes there are three operation modes, and the modes are set by pins ms and vsen. each mode has the different control method resulting in the different gate output to the external power mosfet. table 1 operation mode comparison pin settings output of gate to control the power mos (m1) operation mode ms l vsen off time on time 1 fixed off time mode gnd vreg it is fixed at 4 s (typ.). (when v rc =0v) it is determined by voltage detection in isen1 pin 2 automatic off time control mode gnd connected to the secondary side of the transformer it is determined by voltage detection in vsen pin it is determined by voltage detection in isen1 pin 3 critical mode vreg connected to the secondary side of the transformer it is determined by detecting 0 ma of led current in vsen pin it is determined by voltage detection in isen1 pin 11.2.1 fixed off time mode led current i led in path a is detected as the voltage on the current-sense resistor rset on the isen1 input. when led i rises to the set peak current ledp i , m1 is turned off. and m1 is turned on again after turned off a period of time, for example, 4 s (typ.) when v rc is 0 v. the peak current can be set with the input voltage to ld pin. (please refer to 12.2, figure for details). the off period can be set by an applied voltage to the rc pin. (please refer to 12.3, figure for details). vin of the leds is referred to the unregulated diode bridge rectified dc voltage that can fluctuate considerably. the influence of the input voltage ( v in ) change on the led current can be reduced to the minimum by this control system. this mode can be implemented with fewer components. gate isen1 vsen i led route a i led route b v gate m1 v in ms r set vreg isen2 l figure 1. fixed off-time control i led v gate m1 is on m1 is off peak current iledp a route where i led flows b a b a b a b a b a b a b a b a b a 4us (typ) 4us (typ) 4us (typ) 4us (typ) 4us (typ) 4us (typ) 4us (typ) 4us (typ) 4us (typ)
TB62D901FNG 2012-03-12 9 11.2.2 automatic off time control mode gate isen1 vsen v gate m1 i led route a i led route b v in ms r set isen2 figure 2 automatic off-time control when led current i led in path a, which is detected at the isen1 pin, rises to the set peak current, m1 is turned off. and m1 is turned on again after the off period of m1 (t off ) (refer to figure 2). the peak current is set by an applied voltage to the ld pin. (please refer to 12.2 for details). t off is determined by the voltage on inputs vsen and rc.(please refer to 12.3, figure 3 and 8 for details.). in the example of figure 2, the voltage at vsen pin is generated by the secondary side of the transformer and the input voltage of rc pin. secondary side voltage is stabilized by total v f of led. it is recommended that the voltage generated on the secondary side is divided by resistors and to keep the voltage applied to vsen pin at around 1v. the off ti me of m1 is adjusted automatically when v f of the led and the free wheeling diode are changed due to the temperature characteristics and the change of the voltage applied to vsen pin (compared to 1 v) is detected. figure 3. off time vs. vsen when v rc <0.5v please use the ic by inputting a voltage to the vsen pin in the range of 0.5v to 3.0v or 4.5v to v reg . in this mode, the dependence of the led current on the input voltage v in and v f are reduced. i led v gate m1 is on m1 is off peak current set at pin ld and sensed at pin isen1 a pathes where i led flows t off t off t off t off t off t off t off t off t off b a b a b a b a b a b a b a b a b a
TB62D901FNG 2012-03-12 10 11.2.3 critical mode figure 4 critical conduction mode when i led in path a detected with the isen1 pin rises to the set peak current, m1 is turned off. and m1 is turned on again when vsen pin, connected to the secondary side of the transformer, detects that i led in path b becomes 0 ma approximately. the peak current is set by an applied voltage to ld pin. the influence of input voltage ( v in ) change and v f of led change on the led current (i led ) can be reduced to the minimum by this control system. in comparing to othe r modes, the efficiency can be increased and the noise can be reduced in this mode because m1 switching frequency decreases. while the current flows in the i led path b, it is recommended that the voltage of 0.5 v or more is applied on the vsen pin. gate isen1 vsen v gate m1 i led route a i led route b v in ms vreg r set isen2 i led v gate the peak current is controlled with the isen1 terminal. a b route where i led flows it is zero detection control with a vsen terminal. a b a b m1 is on m1 is off v sen recommend to be the voltage of 0.5 v or more
TB62D901FNG 2012-03-12 11 12. dimming function this TB62D901FNG incorporates three kinds of dimming function. table1 2 dimming control mode comparison control methods dimming results operation mode input pin signal type led current peak current ripple current value 1 pwm dimming pwmd digital signals pwmd=h: on pwmd=l: off fixed fixed 2 linear dimming ld analogue voltage on change fixed 3 ripple dimming rc analog voltage on fixed changed 12.1 pwm dimming the led current is turned on an d off according to the pwm signal input to the pwmd input pin. when this function is not used, please connect pwmd to the vreg pin. figure 5 pwm dimming 12.2 linear dimming this is a linear dimming by controlling the peak current of led. the peak current of led is controlled by v ld the analog voltage applied to the ld pin from which an internal voltage v peak is derived to the input of an internal comparator. the comparator to compare v peak and the voltage from input isen1 of the current sensing resistor r set . v peak is determined by method of applied voltage to ld pin. table 3 v peak setting input voltage to ld pin v ld v peak the ld and the vreg pins are shorten together. (when not using linear dimming by ld input) 1.0v(typ.) the analog voltage is applied to ld pin. v ld /1.5(typ.) (v ld needs to be in the range of 0.2v to 3.8v) . (a) waveform of led curre nt vs control voltage v ld (b) the relation between v peak and v ld figure 6 linear dimming pwm signal i led v ld i led v pea k vs v ld 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v ld (v) v peak (v) do ? not ? set ? it ? in ? this ? area
TB62D901FNG 2012-03-12 12 12.3 ripple dimming this is a linear dimming by controlling the ripple value of led current. t off of m1 is controlled by the analog voltage input to the rc pin. the ripple value of led current is adjusted by changing t off of m1. table 4 setting t off of m1 input to rc pin t off rc pin is connected with the gnd. (in case linear dimming by a rc pin isn't applied.) 4 s (typ.) under the condition that v sen is 1v. the analog voltage is input to rc pin. please refer to the following graph. please set the input voltage to a rc pin (v rc ) in the range of 1.0v to 4.0v. (a) waveform of operation in adjusting the ripple value by rc pin (b) gate turn off time vs v rc figure 7 ripple dimming figure 8 off time vs v rc vsen please use the ic by inputting the voltage to the vsen pin in the range of 0.5v to 3.0v or 4.5v to v reg . v rc =4v v rc =1v v rc =2v v rc =3v v rc =1v v rc =2v v rc =3v v rc =4v
TB62D901FNG 2012-03-12 13 13. detection functions there are several built in detection functions, which are summarized in table 5 table 5 detection modes detection function effect detection point detection level operation in detection reset condition thermal shutdown (tsd) prevention of overheating internal temperature of ic t tsd it stops switching temperature falls by 20c(typ.) or more from the detection level over-current detection (ocp) prevention of over current caused by short-circuit isen1 pin voltage v ocp when it is detected four consecutive times, the ocp operates it stops switching recycle power supply or toggle en under-voltage lockout (uvlo) prevention of malfunction caused by ic supply voltage abnormality vcc pin voltage v uvlo it changes to standby mode. vcc rises by 2.5v(typ.) or more from the detection level over-voltage detection (ovp) prevention of malfunction caused by ic supply voltage abnormality. vcc pin voltage v ovp it stops switching recycle power supply o r toggle en isen1 pin open detection (iop) prevention of over-current caused by detecting pin open. isen1 pin voltage v peak when it is detected that gate pin voltage is 0v for an extended period, the iop operates it stops switching. recycle power supply o r toggle en figure 9 detection overview uvlo, ovp an ic malfunction by abnormality of an input voltage generation circuit is prevented. tsd overheating prevention ocp over-current by short of an led, a transformer and di is prevented. input voltage generation iop over-current by open-circuit of an isen terminal is prevented. fuse vcc gate isen1 vsen gnd pwmd rc TB62D901FNG pgnd vreg ms en ld isen2 pwm input
TB62D901FNG 2012-03-12 14 13.1 thermal shutdown function (tsd) this function prevents overheating of ic. when the ic internal temperature reaches 140c (typ.) or more, the tsd operates. during tsd, output voltage of the gate pin becomes 0v. and switching control of power mosfet is stopped. when the ic temperature falls by 20c (typ.) or mo re from tsd temperature, the normal operation resumes. 13.2 over-current detection function (ocp) though led current is usually controlled to keep the voltage of the isen pin (v peak ) or less, the led current becomes out-of- control and increases sudd enly when the led, the transformer, and the diode are short-circuited. ocp prevents this sudden increase. ocp operates when the voltage of the isen1 pin becomes v ocp or more for four cycles continuously (it counts from switching of the 2nd shot after power on.). isen1 over-current detection peak current detection v ocp v peak gate ref ld logic gate driver qs r r set comp comp figure 10 ocp block diagram when ocp operates, output voltage of the gate pin becomes 0v. and it moves to the switching stop mode. by recycling power supply or toggling en (en=h l h), it returns to normal operation mode. table 6 setup of v ocp and v peak input to the ld pin v ocp v peak ld pin is connected with the pin v reg . (when linear dimming by a ld pin isn't used) 1.6v (typ.) 1.0v (typ.) the analog voltage is input to ld pin. v ld +0.2 (typ.) @v ld =3.8v v ld /1.5 (typ.) 13.3 under-voltage lockout function (uvlo) this function prevents a malfunction in ic supply vo ltage abnormality caused by trouble of an input voltage generation circuit. when input voltage of the vcc pin becomes 8.5v (typ.) or less which corresponds to uvlo operation voltage, uvlo operates. when uvlo operates, output voltage of the gate pin becomes 0v. and it moves to standby mode. when if input voltage of the vcc pin rises by 2.5v (typ.) or more from uvlo operation voltage, normal operation resumes.
TB62D901FNG 2012-03-12 15 13.4 over-voltage detection function (ovp) this function prevents a malfunction in ic supply vo ltage abnormality caused by trouble of an input voltage generation circuit. this function becomes effective from switching of the 2nd shot after power supplies. when input voltage of the vcc pin becomes 35v (typ.) or more which corresponds to ovp operation voltage, ovp operates. when ovp operates, output voltag e of the gate pin becomes 0v. and it moves to switching stop mode. by recycling power supply or toggling en (en=h l h), normal operation resumes. 13.5 isen1 input open de tection function (iop) when the isen1 pin, which controls on time, is open, the peak current of led becomes out-of-control. this function prevents an over-current flowing to an led. the path, in which the detection current of 2 a (typ.) flows, disappears when the isen1 pin is open. and the voltage of isen1 pin rises. w hen the voltage of the isen1 pin rises to v peak under the condition the t gate pin voltage is 0v, the iop operates and it moves to the switching stop mode. by recycling power supply or toggling en (en=h l h), normal operation resumes. isen1 open detection gate logic gate driver r set comp v peak 2a(typ) figure 11 isen1 open detection block diagram
TB62D901FNG 2012-03-12 16 14. ic power supply in normal operation, the current is supplied from the transformer auxiliary winding. and in starting, the current is supplied from the ac line, and it charges c sta through startup resistance (r sta ). when the voltage of vcc pin rises above 11v (typ.) or more, the uvlo is released, and ic starts operation. when the voltage generates in the auxiliary winding of a transformer by switching of power mosfet, v cc supply from auxiliary winding starts. fuse vcc TB62D901FNG regulator gate vsen isen1 when starting, the current is supplied from the ac line, and it charges c sta . r sta c sta when regularly operating, the current is supplied from the transformer auxiliary winding. when vcc becomes 11v(typ) or more, ic is driven by the charge voltage of c sta . figure 12 the diagram of power supply figure 13 the timing chart of power supply vcc terminal voltage charge voltage of c sta gate terminal voltage uvlo release voltage (v uvlo(up) ) uvlo operation voltage (v uvlo(down) ) v cc is supplied by the c sta charge voltage of the ac line v cc is supplied by the voltage of the transformer auxiliary winding. voltage of the transformer auxiliary winding vreg terminal voltage vreg-uvlo release voltage
TB62D901FNG 2012-03-12 17 15. transition state 15.1 detection function the c ircuits other than the regulator circuit, the standard voltage circuit, and the uvlo circuit stop, and the gate terminal output is fixed 0v. tsd ovp uvlo ocp en=l setting v cc v ovp power supply reboot v cc =0v more than 11v en reboot en=h l h en=h en=l v cc v uvlo(down) v cc v uvlo(up) t j t tsd t j t tsd -t tsd(hys) v isen1 v ocp is detected consecutive four times. iop when gate terminal voltage is 0v, v isen v peak the gate terminal output is fixed 0v. pwmd pwmd=l pwmd=h en=l v cc v uvlo(down) power supply on power supply reboot v cc =0v more than 11v en reboot en=h l h power supply reboot v cc =0v more than 11v en reboot en=h l h figure 14 detection states transition when two or more fault conditions occur, the ic will not switch unless the each reset condition is completed.
TB62D901FNG 2012-03-12 18 15.2 gate control 1. off time fixed mode figure 15 states transition in fixed off time mode 2. off time automatic adjustment mode figure 16 states transition in adaptive off time mode 3. critical mode figure 17 states transition in critical mode
TB62D901FNG 2012-03-12 19 16. application diagram
TB62D901FNG 2012-03-12 20 17. package dimension unit: mm weight: 0.07 g (typ.)
TB62D901FNG 2012-03-12 21 notes on contents 1. block diagrams some of the functional blocks, circui ts, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of th em may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purp oses only. thorough evaluation is required, especially at the ma ss production design stage. toshiba does not grant any license to any industrial prop erty rights by providing th ese examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device charac teristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor device ar e a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] use an appropriate power supply fuse to ensure that a la rge current does not continuous ly flow in case of over current and/or ic failure. the ic will fully break down when used under co nditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abn ormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropri ate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] if your design includes an inductive load such as a motor coil, incorpor ate a protection circuit into the design to prevent device malfunction or breakdow n caused by the current resulting from the inrush current at power on or the negative current resulting from the back electr omotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protection fu nctions. if the power supply is unstable, the protection function may not operate, causing ic breakdow n. ic breakdown may cause in jury, smoke or ignition. [4] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power co nsumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakd own, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied th e current with inserting in the wrong orientation or incorrectly even just one time.
TB62D901FNG 2012-03-12 22 [5] carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakag e current such as input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is conne cted to a speaker with lo w input withstand voltage, overcurrent or ic failure can cause smok e or ignition. (the over current can cause smoke or ignition from the ic itself.) in particular, please pay atte ntion when using a bridge tied load (b tl) connection type ic that inputs output dc voltage to a speaker directly. points to remember on handling of ics (1) heat radiation design in using an ic with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified j unction temperature (t j ) at any time and condition. these ics generate heat even during normal use. an inad equate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteri stics or ic breakdown. in addition, pl ease design the device taking into considerate the effect of ic heat ra diation with peripheral components. (2) back-emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back- emf. if the current sink capability of the power supply is small, the device?s motor power supply and output pins might be ex posed to conditions beyond absolute maximum ratings. to avoid this problem, take the effect of back-emf into consideration in system design.
TB62D901FNG 2012-03-12 23 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively ?toshiba?), reserve the right to make changes to the in formation in this document, and related hardware, software a nd systems (collectively ?product?) without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba?s written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product?s quality a nd reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid sit uations in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers mu st also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specificati ons, the data sheets and application notes for product and the precautions and conditions set forth in the ?toshiba semiconduc tor reliability handbook? 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